Variations and drifts in FET performance can originate from a variety of physically-distinct mechanisms during integrated circuit manufacture. While some, like gate-oxide thickness/depletion can readily be detected from standard tests. For other mechanisms no routine in-line tests exist. Without knowing the underlying root-cause of performance variations it becomes impossible to evaluate the robustness and manufacturability of a fabrication process. It also makes corrective actions more difficult to decide what corrective actions to take when variations are found and makes allocation of resources for process-control activity difficult. Accordingly, there exists a need in the art to overcome the deficiencies and limitations described hereinabove.